A High-Performance Mixed-Logic 4-16 Decoder Designed Using the GDI Technique

Authors

  • Gunjan Bhatnagar, Ashish Gupta, Yogesh Kumar

DOI:

https://doi.org/10.17762/msea.v71i4.684

Abstract

The safety and integrity of the data being sent wirelessly should always come first. The primary goal in the development of the decoders was to provide standardized encryption and decryption methods, with the secondary aim of ensuring the confidentiality of data transmissions. Audio systems rely on decoders to convert analog signals to digital data. It acts as a decompressor, allowing compressed media like movies and images to be restored to their uncompressed state. Decoders are electronic circuit-based devices that take computer instructions and generate CPU control signals. There was already a plan for making a 4-16 line decoder, and it included combining two 2-4 decoders. These decoders' outputs were wired into the inputs of fifteen CMOS NAND gates. TGL and DVL logic are used throughout the design process of 2-4 decoders. Now we are going to change these CMOS NAND gates such that they are replaced with GDI logic, which stands for gate diffusion induced logic. The other logic will stay the same. PYXIS GDK 130nm technology is able to be used in the production of this design (MENTOR GRAPHICS). In terms of switching energy, latency, and power-delay product, the decoder outperforms the previously used decoder.

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Published

2022-09-02

How to Cite

Gunjan Bhatnagar, Ashish Gupta, Yogesh Kumar. (2022). A High-Performance Mixed-Logic 4-16 Decoder Designed Using the GDI Technique. Mathematical Statistician and Engineering Applications, 71(4), 1594–1604. https://doi.org/10.17762/msea.v71i4.684

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Articles