Power Optimized High Pass Digital FIR Filter Using LDPC Code

Authors

  • R. Durgagopal, Dr. D. N. Rao

Abstract

In the many diverse signal processing systems, including control systems, video or audio processing systems, noise - reducing applications, and other telecommunication networks, digital signals play an important role. Due to its spectrum stability and phase shift response, FIR filters are used in this situation. In this paper presents design and implementation of power optimized high pass digital FIR filter using ripple carry adder and radix 4 modified booth algorithm and Low Density Parity Check (LDPC) method is used. Aim of this paper to reducing the errors in transmitted signals using LDPC codes in now days LDPC codes are widely used in 4G and 5G communication. In this paper ripple carry adder and radix 4 modified booth algorithm used to reducing the time delay of the circuit. Comparing our proposed method to existing high pass filter using polar code method. Further the optimization technique is used for filter coefficients optimization after the error correction from the transmitted signals. Design and implement our Verilog code using Xilinx vivado 2020.1 tool and its outputs are verified using simulation tool. Area, Power and Delay are calculated using Xilinx vivado 2020.1 tool. 

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Published

2022-06-09

How to Cite

R. Durgagopal, Dr. D. N. Rao. (2022). Power Optimized High Pass Digital FIR Filter Using LDPC Code . Mathematical Statistician and Engineering Applications, 71(3), 407 –. Retrieved from https://philstat.org.ph/index.php/MSEA/article/view/178

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Articles